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Centre Capabilities

Optimisation Techniques: From semiconductor packages to evacuation

Collaboration between Centre staff is focused on research that aims to bring techniques originally developed to optimise the design of semiconductor packaging for ICT product reliability to potentially optimise the layout of buildings, aircraft and ships for efficient evacuation.

Project Optimisation Diagram

A common problem faced by fire safety engineers in the field of evacuation analysis is the optimal positioning of exits within an arbitrarily complex structure. Understanding the effect of these building design variables on the objective of minimising the time it takes for an evacuation is very important for the engineer. This problem is usually addressed through time consuming and expensive trial and error experimental trials/modelling. While a solution is usually found to this problem, it is seldom the optimal solution, resulting in a compromise in building performance and safety. For instance, there is no clear guidance regarding where to place an exit in order to produce minimum evacuation times. Is it better to have two exits of X m width or one exit of 2X m width? If two exits are required, what is the optimal relative positioning of these exits? The analysis required to address these questions grows in difficulty as the available options - and hence complexity - of the scenario increases. Attempting to address this issue while dealing with only two exits may be manageable, but what if there were 10 exits, each of varying dimensions? How would the engineer know he had found the optimal or near optimal solution?

A possible solution to this problem may be found in numerical optimisation techniques. Numerical optimisation techniques have been applied in a range of different fields, such as structural analysis, and have shown to be a powerful tool for designers, saving their time and consequently reducing costs during the process. Within the Centre, the CMRG has pioneered the development of these techniques based on both direct optimisation and response surface analysis.

The original application area in which CMRG used optimisation was the packaging of semiconductors which are placed inside Information and Communications Technology (ICT) hardware (i.e. mobile phone, laptop, avionics system, ignition system, pacemaker, etc). In this application the optmisation objective is to minimise the mechanical stress in the package and hence maximise overall product reliability.

Predicting reliability is a common problem faced by ICT design engineers where reliability defines the probability that a product will continue working for a defined period of time. For semiconductor packages the reliability is severely affected by the magnitude of mechanical stress generated in its materials. If this stress is too high then cracks will form in the materials and the product will fail. These stresses are generated when the product is operating in its external environment, which can be in the harsh environment under a car bonnet, or in the very cold environment on a satellite system in space. Predicting the magnitude of these stresses and their effect on reliability is very important to the design engineer. But this is not the only question the engineer will have. Optimisation allows the engineer to fully investigate how sensitive reliability is to small changes in the design variables of the product. For semiconductor packaging these design variables are the location of the package on a printed circuit board, the dimensions of the package, and the materials used in the package (i.e. how stiff they are, and how good they are at removing heat). Optimisation also allows the engineer to search the product design space, starting at an initial design and then intelligently moving through the design space to identify a new design which, in this case, minimises the stress magnitudes in the package.

CMRG has coupled its reliability modelling techniques to numerical optimisation and Design of Experiments (DOE). This combination is providing a very powerful engineering tool for predicting stress in the semiconductor packages, both in a test environment and in the field environment, and to then to identify optimal product design variables that maximise overall reliability.

FSEG, with the assistance of the CMRG is currently exploring the concept of combining DoE numerical optimisation techniques with evacuation simulation provided by the buildingEXODUS simulation tool. Through this research they aim to develop a systematic methodology to efficiently optimise evacuation safety aspects of structural designs. Such an approach will be of particular interest to practical fire engineers as it allows the fire engineer to rapidly and efficiently optimise their design.